The present invention relates to a semiconductor device and, more particularly, to a method for manufacturing a high capacitance capacitor having a hemispherical grain (HSG) film formed on a lower storage node of a stack structure. The HSG film is formed on the overall surface of a substrate except that the lower storage node can be removed without damaging the HSG film formed on the lower storage node.
The basic principle and structure of a capacitor is simple. The capacitor is comprised of two metal plates facing each other and an insulator (generally, referred to as a dielectric) inserted between them. The importance of the capacitor in a semiconductor device is its ability to store charge. Most data that we use are expressed in terms of binary digits, i.e. ones or zeros. That is, ones and zeros correspond to the absence and presence of current or voltage, respectively, in electrical terms. Without a device to store charge, the data could not be expressed.
The discrete components which constitute a semiconductor device have gotten smaller as the integration level of the semiconductor device has increased. The discrete components used in a semiconductor device have different functions according to their usages. For example, a capacitor simply functions as a storage of charge while some capacitors function to store and express useful data, like a memory cell. Although there are functional differences between capacitors depending on their usages, the capacitors should satisfy the requirement of large charge-storage capacities, namely, large capacitor capacitances.
By making a capacitor's capacitance as large as possible with a relatively small size, the capacitance is increased, in a real sense. Capacitors small in size, yet having large capacitance are needed in present day semiconductor devices. Indeed, a way for increasing a capacitor's capacitance is urgently needed for today's semiconductor devices. In semiconductor devices, as the integration level has increased the available area for capacitors has decreased, while the required capacitance of the semiconductor device has not decreased. Therefore, there have been continuous studies on ways to increase the effective area of a capacitor. Most of the storage node structures of capacitors which are currently widely used and have large effective areas are three-dimensional. To ensure sufficient capacitance for a semiconductor memory device, the effective surface area of a storage node must be increased and, for this purpose, the storage node structure should be three-dimensional.
There are limitations, however, on changing the storage node structure in practice. In the case where the storage node is formed too high, many problems arise in relation to step height in the subsequent process for forming a dielectric film. In another case where the volume of the storage node is increased horizontally, problems relating to contact with adjacent storage nodes arise. Further, because of process complexity there has been difficulty in achieving a desired storage node structure, in practice. Three-dimensional storage node structures which have been developed so far are stack, fin and cylindrical ones. They are advantageous with respect to capacitance, but their manufacturing processes are complicated. To manufacture a storage node having a maximum effective area with a simple manufacturing process, a simple three-dimensional stack-structured storage node having an HSG film deposited thereon has been recently invented. If an HSG is ideally deposited on a unit area, at least two unit effective areas are obtained. As a result, a capacitor having a storage node structure where HSGs are deposited ensures greater capacitance when other factors, i.e. the dielectric constant and the distance between plates, are constant.
However, a capacitor using a storage node structure involving an HSG film has not been desirable, in practice, since HSGs can be controlled only indirectly with the help of complex equipment. An example of a capacitor using a storage node structure involving an HSG film is shown in "A Capacitor-Over-Bit-Line (COB) cell with a hemispherical-grain storage node for 64 Mb DRAMs: IEDM, 1990, pp.655-658." For an HSG film to be used in a capacitor, a conductive impurity must be implanted into the HSG film. There are two currently used methods: one involves direct ion-implantation into the HSG film and the other involves implanting the conductive impurity earlier into a lower storage node which then diffuses into the HSG film. Therefore, the formed size of the HSGs depends on whether the surface of the lower storage node is planar or curved. Further, it is impossible to form HSGs only in a predetermined area. Thus, an HSG film formed between storage nodes must be removed to ensure capacity reliability. In the removal process, the lower storage node and the HSG film formed thereon are frequently damaged, resulting in a decrease in capacitance of the capacitor.
A conventional method for manufacturing a capacitor having an HSG film on a stack-structured storage node will now be described in detail, referring to the attached drawings.
FIGS. 1 through 4 illustrate the steps for manufacturing a capacitor according to the conventional method.
FIG. 1 shows the step of forming insulating layers including a contact hole. As shown in FIG. 1, a first insulating film 3, a second insulating film 5 and a third insulating film 7 are sequentially formed on a semiconductor substrate 1 including a transistor (not shown). A photoresist (not shown) is coated on third insulating film 7 and patterned. The portions of first insulating film 3, second insulating film 5 and third insulating film 7 exposed by the photoresist pattern are sequentially etched, thereby forming a contact hole 9. A spacer 11 is formed on a sidewall of contact hole 9 and then the photoresist pattern is removed. Second insulating film 5 is formed of a nitride film and third insulating film 7 is formed of an oxide film.
FIG. 2 shows the step of defining a lower storage node pattern. As shown in FIG. 2, an in-situ doped polysilicon layer 13 (hereinafter, referred to as a conductive layer) is formed on the overall surface of contact hole 9 and third insulating film 7 shown in FIG. 1. A photoresist (not shown) is coated on the overall surface of conductive layer 13. Thereafter, a photoresist pattern 15 is formed by patterning the photoresist, to thereby define a storage node.
FIG. 3 shows the step of forming the HSG film. As shown in FIG. 3, conductive layer 13 is dry-etched by using photoresist pattern 15, shown in FIG. 2, as a mask, thereby forming lower storage nodes 14. The etching is performed until the interface of third insulating film 7 is exposed. Thereafter, photoresist pattern 15 is removed and an HSG film 17 is deposited on the overall surfaces of lower storage nodes 14. To implant a conductive impurity into HSG film 17, the resultant structure on which HSG film 17 has been deposited and the overall surfaces of lower storage nodes 14, are subjected to thermal processing. Thus, the conductive impurity of lower storage nodes 14 is implanted into HSG film 17 by diffusion.
FIG. 4 shows the step of removing the HSG film formed on the overall surface of substrate 1 except for lower storage nodes 14. As shown in FIG. 4, HSG film 17 formed on the overall surface of substrate 1, except for lower storage nodes 14 in FIG. 3, is removed by anisotropic etching. In this step, not only lower storage node 14 but HSG film 12 formed thereon is damaged, thereby decreasing the capacitance of the capacitor. Then, a high dielectric film (not shown) is formed on the overall surface of lower storage node 14 by usual methods, and an upper storage node (not shown) is formed on the high dielectric film. Thus, the capacitor is completed.
In the conventional capacitor manufacturing method, the manufacturing process is simple and the HSG film can be formed to be large by employing the stack-structured lower storage node. Thus, it is advantageous in that the effective area of a capacitor can be maximized. However, when removing the HSG film formed between adjacent lower storage nodes, the lower storage node and the HSG film formed thereon are damaged, thereby decreasing the capacitance of the capacitor.